POETICS

Topic

POETICS targets the development of novel Terabit optical engines and optical switching circuits and to co-package them with digital switching chips to realize Multi-Chip Modules (MCM) with Tb/s capacities, very high energy efficiency that fit into the roadmap of vendors. Enabling terabit-capacity optical interconnects requires a paradigm shift in the packaging approach. The electrical interconnect distance between the optical engine (OE) and the digital switching chip must be minimized, removing signal conditioning chips and unwanted components like sockets that would otherwise be required and would inevitably lead to increased power consumption and reduced signal integrity. It also requires the right combination of photonic and electronic technology to be integrated to deliver high performance, low-cost and energy efficient optical engines. This approach has the potential to remove the optical interconnect bandwidth bottlenecks and allow DC networks and the 5G wired infrastructure, which heavily rely on them, to grow.

In order to achieve these goals, POETICS will utilize SiGe BiCMOS, InP, PolyBoard and TriPleX technologies and rely on hybrid integration, which allows the selection and combination of the best performing components. Specific targets in POETICS are:

1. MCM with 1.6 Tb/s OEs based on 8-fold InP-EML arrays (200 Gb/s per lane) and PolyBoard with parallel SMFs on par with the PSM/DR spec for 500 m-2 km intra-DC connectivity
2. MCM with 1.6 Tb/s OEs based on 8-fold InP-EML arrays (200 Gb/s per lane) and 3D PolyBoard with duplex MCFs for 5G optical fronthaul applications
3. low-power-consumption 3D Benes optical switch
4. MCM coherent 64 Gbaud OEs with up to 600 Gb/s capacity of DC interconnect applications within 80 – 120 km reach on par with 400G-ZR specification

In POETICS Fraunhofer HHI provides its InP technology and PolyBoard platform for the development of hybrid integrated circuits comprising EML arrays and phase modulators for high-speed data transmission as well as 3D photonic structures for crossing-free switches. A special focus is placed on the investigation of novel assembly techniques for the efficient combination of active and passive parts of the MCM.

Goals

a.      „New generation of uncooled EMLs“
We demonstrate an EML for 200 Gb/s PAM4 modulation at uncooled conditions. The device has an identical MQW layer stack for the DFB, EAM and SOA section, which allows a simple fabrication process. The EML is designed for balanced performance from 20°C to 85°C.

b.      “Development of a InP travelling wave electrodes based Mach-Zehnder modulators”
High-speed (80 Gbps), low drive-voltage (VπL = 0.9 V-cm), low insertion loss (IL = 11 dB) travelling wave electrodes based Mach-Zehnder modulators are presented on an open-access InP platform.